The invention relates to the field of linearized transistors for a linear amplifier stage and in particular to circuits which employ a transistor cell to produce a high linearity amplifier.
There are many kinds of linearization techniques for amplifier designs. All these techniques employ circuitry around the nonlinear active transistor cell. FIG. 1 shows an example of an active transistor cell 20. The transistor cell 20 includes a FET 22 having a gate 26, source 28, and drain 30. The gate 26 and drain 30 and each are coupled to their corresponding voltages Vg and Vd, while the source 28 is coupled to ground. Moreover, a resistor 24 is coupled between the drain 30 and source 28 of the FET 22. However, in prior art the relationship between the transconductance gm1 of the FET 22 and the gate to source voltage (Vgs) are tightly correlated and thus degrades the linearity of FET 22.